[600MRG] Tuning my transmitter

[John Langridge]

One additional comment would be that you might try removing one of the
FET's and drive a single as a test.  The gate capacitance is pretty high on
the 540 and that could complicate things a bit.

The PVC coils are difficult to get right and have an impact to Q due to the
use of PVC forms.  Don't get too hung up on measuring the inductance and
getting it "just so", instead, wind on T106-2 with the values I sent and it
should be spot on.  That design is incredibly forgiving and wants to make
power...

You should see huge power possibilities with at design.  I run out of power
supply around 160w but the amp is no worse because of it and has even more
headroom to spar.

73 and good luck!

John

On Fri, Oct 23, 2015 at 12:50 PM, Steve Flood <kk7uv at bresnan.net> wrote:

> Yes – that is the version I built, with the added caps as directed.  I
> also have the diode/resistor pair on each gate.
>
>
>
> I am using PVC coil forms however.  I will try the toroids though.  Thanks!
>
>
>
> Steve
>
>
>
> *From:* John Langridge [mailto:kb5njd at gmail.com]
> *Sent:* Friday, October 23, 2015 8:38 AM
> *To:* Steve Flood
> *Cc:* 600mrg at w7ekb.com
> *Subject:* Re: [600MRG] Tuning my transmitter
>
>
>
> Steve -
>
> First make sure you are using the most current revision to the circuit.
> Here is a link to current revision:
> http://www.gw3uep.ukfsn.org/100W_QTX/100WTX/PA_cmos.gif
>
> Note that there is a 680 pF in parallel with C1.  That was missed in
> earlier revisions.  It will have a major impact.
>
> Note also that C2 has an additional 1200 pF in parallel for a total of
> 17000 pF.
>
>
>
> I also find switching to ferrite rather than using the PVC coil forms is a
> lot better.
>
> Using a T106-2, L1 (12 uH): 30 turns, L2 (6.5 uH): 22 turns, L3 (16 uH):
> 34 turns.
>
> You mention two FET's, Im guessing you duplicated the clipper
> diode/resistor pair on the gate for each FET...
>
>
>
> Candidly, I have built these in my sleep, hastily tacking down junk to a
> copper board, and even being sloppy I can get better than 85% efficiency on
> the first try so I am guessing maybe you have some component tolerances
> that are not tight enough (2.5% can be important in the filter network) or
> have left a few of the revised parts out as mentioned above.  This should
> be a design that just works right out of the box.
>
> 73 and good luck!
>
> John XIQ
>
>
>
> On Fri, Oct 23, 2015 at 8:53 AM, Steve Flood <kk7uv at bresnan.net> wrote:
>
> I am using the GW3UEP 100w transmitter circuit.  I have two IRF540's in
> parallel.
>
> I am attempting to optimize my transmitter efficiency while learning
> something about FET operation and Class E behavior.
>
>
>
> In much of what I've been reading, tuning and optimization is done while
> monitoring drain voltage and drain current, with the idea that one of these
> must be zero when the other is non-zero or "on".  However, I do not have a
> current probe for my oscilloscope, nor do I intend to buy one for $1700
> (Rigol).   By only looking at drain voltage, I've only made minor
> adjustments to the tank circuit to make the waveform look as clean as
> possible.
>
>
>
> With my power input at 86 watts (24v @ 3.6A),  I get 64 watts out to a
> dummy
> load, or 74% efficiency.  GW3UEP specifies 80% and the general class E
> literature cite efficiencies in excess of 90% (such as Sokal's 2001 QEX
> article).
>
>
>
> Without a current probe to measure drain current, how are others
> tuning/optimizing such circuits?
>
>
>
> Thanks,
>
> Steve KK7UV/WH2XNV
>
>
>
>
>
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